Branch Model: FACRI_SC

 

Model Equations and/or Block Diagram

Parameters:

Monitored Bus Bus at which the voltage is monitored
volt_high High cut-in voltage (pu)
volt_low Low cut-in voltage (pu)
td_high High cut-in time delay (sec)
td_low Low cut-in time delay (sec)
Extra Object 1 Line 1
Extra Object 2 Line 2
Extra Object 3 Line 3
Extra Object 4 Line 4
Extra Object 5 Line 5
Extra Object 6 Line 6
Extra Object 7 Line 7
Extra Object 8 Interface 1

The following pseudo code describes how the inputs are used to determine series capacitor switching:

SeriesCap = Series capacitor to which this model is assigned

LineSectionsAreOpen = Any line section open for Extra Object 1 to 7

CapBlocked = ((Interface1 MW Flow < -50) OR (Interface1 MW Flow > 0)) AND LineSectionsAreOpen

If ((not CapBlocked) and (SeriesCap.Status = Bypassed)) AND ((Monitored Bus Voltage < volt_low for td_low) OR (Monitored Bus Voltage < volt_high for td_high))

Then Begin

SeriesCap.Status = Not Bypassed

End